(Sr) ASIC Design Engineer
1、As part of the ASIC design team, engineer will mainly focus on following areas, but not limited to.
2、Deeply understand system level requirements and IP features, create sub-system design.
3、Deeply understand system level requirements and IP features, create sub-system design.
4、Assist with chip bring up and perform silicon functional/performance validation.
5、Assist with implementation team on netlist release, P&R suggestion and timing tuning.
1、 Degree in electrical engineering, computer engineering or related technical fields.
2、 Good knowledge of Verilog/SystemVerilog.
3、 Hand on experience on any of these tasks: Lint/CDC check, SDC/UPF generation, Synthesis, Formal.
4、 A high-level of self-motivation and a proactive approach to solving problems.
1、 Hands on experience on Subsystem level design.
2、 Familiar with Vendor’s PCIE controller and Phy, both function and test mode.
3、 Familiar with AMBA spec and SOC architecture.
4、 Familiar with frontend ASIC design methodology/flow.
5、 Experience of Low power design.
6、 Experience of follow IP is a strong plus: PCIE/UFS/USB/eMMC/GPU/ISP/MIPI/VPU/NPU/ DisplayPort/NoC/DDR/Ethernet/ AMBA AXI/AHB/APB/ GIC/SMMU/CoreSight.